What is Emitter Coupled Logic? | ECL

Emitter Coupled Logic | ECL

The speed of Emitter Coupled Logic is faster than all other logic families, so it is used in very high speed applications. The main reason for the higher speed achieved in ECL is that the transistors are combined in the differential amplifier system. In ECL, the transistors operate between cut off and active region instead of operating in fully saturated and cut off conditions. In ECL it is possible to achieve propagation delay times of less than 1 nano sec.

Basically the working of ECL is based on the difference amplifier. In this logic the emitters are interconnected. Hence it is called Emitter Coupled Logic. A 3-input ECL gate is shown in the figure. It has three main parts. The middle section performs logic operations. T1, T2 and T3 are logic transistors in the circuit. T4 is the reference transistor. The emitters of the logic transistor and the reference transistor are interconnected. The value of common emitter resistance RE is large and it acts like a constant current source. The reference voltage VR is given to the base of transistor T4.

ecl
emitter coupled logic

Operation of Emitter Coupled Logic Circuit | Operation of ECL circuit

When all inputs A, B and C are at ground potential (logic 0) then T1, T2 and T3 are at cut off and no current flows through resistor R1. The common collector potential of transistor T1, T2, T3 becomes almost equal to Vcc. This drives the transistor T5 into conduction. Hence the output of T5 becomes positive (logic 1).

If any one input is positive and its value is greater than the reference voltage VR (logic 1), then current will flow in the transistor related to that input. The value of the collector voltage will be less, due to which the output of the ampere of transistor T5 will also reduce (logic 0).

Properties of ECL | Advantages of ECL

Due to mutual coupling of the emitters, the transistor does not go into saturation because the resistance RE acts as a constant current source. As the current in the logic transistor (T1, T2 or T3) increases, the current in the reference transistor T4 decreases. By not going into saturation of the transistors, the circuit achieves very fast switching speed which is in few nanoseconds. The power consumption in ECL is relatively high (about 50 mW). Using an emitter follower, the output impedance of the circuit is very low so that the fan-out value is high (about 25).

The ECL family is mainly used in large computers where the priority is high operating speed.

ECL ‘OR/NOR’ gate

An ECL OR/NOR gate is shown in figure (a). Figure (b) shows the symbol of a 3-input OR/NOR gate (ECL OR/NOR Gate symbol).

ecl or nor gate

  • Fig. (a) – 3-input ECL OR/NOR gate
  • (b)Symbol of 3-input ECL OR/NOR gate

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